| 摘要 |
PURPOSE:To provide two functions of page mode and nibble mode by a semiconductor storage device by constituting the 2nd CAS buffer circuit with an NAND circuit for an external column address storobe signal (Ext.CAS) and a signal going to H with a delay time when the Ext.CAS goes from L to H. CONSTITUTION:An output RAS of an RAS buffer circuit is an inverting signal generated in synchronizing with the Ext.RAS. Thus, a node B is brought into H when the RAS goes to H. Thus, a gate of MOS transistors (TRs) 1, 4 goes to H level and both the MOS TRs are turned on. On the other hand, when the Ext.CAS is at H in this case, MOS TRs 2, 5 are turned on and the nodes A and C go to L level when the ratio between the MOS TRs 1, 2 and the MOS TRs 4, 5 is taken sufficiently. When the Ext.CAS goes to L, the MOS TRs 2, 5 are turned off, the nodes A, C go to H level and the CAS1 goes to H. |
