发明名称 |
MULTIPLEX QUEUE BUFFER CIRCUIT |
摘要 |
PURPOSE:To form economically plural queues by referring to and replacing the status information words corresponding to those queues if the input data reaches each queue or a request is given for extraction of output data. CONSTITUTION:A memory 7 has a status information region of one word which stores the status information words S containing status information S1n-S3n showing the presence or absence and the arriving order of data to three data buffers B1n-B3n consisting of one word respectively for each queue. A status information state shift circuit 8 supplies the word S read out of the memory 7 and the control signal C given from a control circuit 11 and delivers a buffer designating information A which designates the buffers B1n-B3n which store the data supplied and delivered as well as the word S showing the states of data buffers after the data are supplied and delivered. |
申请公布号 |
JPS59135528(A) |
申请公布日期 |
1984.08.03 |
申请号 |
JP19830009531 |
申请日期 |
1983.01.24 |
申请人 |
FUJITSU KK |
发明人 |
KITAMURA NOBUAKI;SATOU HIROAKI |
分类号 |
G06F13/38;G06F3/00;G06F5/06 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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