发明名称 SYSTEM FOR CONVERTING SYNCHRONIZING AND ASYNCHRONIZING DATA
摘要 PURPOSE:To miniaturize a device such as MODEM and to make it inexpensive by attaining asynchronizing/synchronizing data conversion by interruption and including the said function to an MPU for modulation such as MODEM. CONSTITUTION:The asynchronizing data, i.e., start-stop synchronizing data is formed by a terminal device 1 as shown in a start-stop synchronizing data train 2 and outputted in time series. This data train 2 is connected to an external interruption B of the MPU 3 so as to detect a start bit. Then, a time of 1-bit length is set to a timer 4 and the data is sampled similarly and stored in a buffer register 5. This operation is repeated and when the data is sampled until a stop bit, this data is transferred in an output register 6 in parallel. Further, the external interruption B is enabled so as to detect the start bit. The start-stop synchronizing data is outputted from the output register 6 sequentially by an external interruption A. Logical value ''1'' is written in an idle bit of the output register 6 produced as each shift as shown in Figs. (b)-(g) at this output.
申请公布号 JPS59134946(A) 申请公布日期 1984.08.02
申请号 JP19830008977 申请日期 1983.01.21
申请人 FUJITSUU DENSOU KK 发明人 MIYAKI SAKAE;ENDOU AKIO
分类号 H04L13/08;H04L13/00 主分类号 H04L13/08
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