发明名称 STEREO DEMODULATING CIRCUIT
摘要 PURPOSE:To attain no adjustment of a synchronizing frequency without using resonator by rpoviding two systems of LPFs and a variable amplifier in a phase locked loop and adjusting the amplification gain to change a sysnchronizing frequency band. CONSTITUTION:Passing frequency band of the LPFs 10,12 is taken respectively as f1,f2. The former is a narrow band and the latter has the relation of f1>f2. Before a PLL circuit 4 is locked to a pilot signal of a stereo signal, a gain A1 of an amplifier 14 is set low and a gain A2 of an amplifier 16 is set high, and after locking, the gain A1 is set high and the gain A2 is set low. This adjustment is performed continuously and linearly by interlocking each amplifier. Let characteristics A and B be gains of the amplifiers 14, 16 to a system, then the system of the amplifier 16 keeps the characteristic B before syncrhronism and the system of the amplifier 14 decreases the gain as shown in the characteristic A' by the gain adjustment. The synthesized characteristics of them is the sum of the both, the frequency band is extended and a high gain is attained at the band. After locking, the systems of the amplifiers 14,16 are adjusted for the gain as shown in the charcteristics A',B', and the frequency band of the synthesized gain is narrowered.
申请公布号 JPS59134934(A) 申请公布日期 1984.08.02
申请号 JP19830008532 申请日期 1983.01.21
申请人 ROOMU KK 发明人 HIKITA JIYUNICHI
分类号 H03D1/22;H04H40/54 主分类号 H03D1/22
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