| 摘要 |
<p>PURPOSE:To designate an input/output mode for every specific bit without increasing the number of instructions, by switching the first FF and the second FF to use them as an FF, where output data of an internal bus should be latched, with the output signal of the third FF. CONSTITUTION:A reset signal 13 resets the third FF 17, and a timing signal 10 is supplied to the second FF 15 through an AND gate 19. At this time, data of the n-bit interval bus is latched in the FF 15 and becomes inout/output mode designating data. If this signal is in a high level, output drivers 4 and 5 are turned on in accordance with the signal of the first FF 8 to set the output mode. If the input/output mode signal is in a low level, output drivers 4 and 5 are turned off to set the input mode. The timing signal 10 sets the third FF and is inputted to the first FF 8 through an AND gate 18. In this case, data of the n-bit internal bus is latched in the first FF and becomes an output data signal.</p> |
