发明名称 CLOCK SWITCHING CONTROL SYSTEM
摘要 PURPOSE:To switch clocks without controlling clocks at all, by ensuring phases of clocks to switch clocks during the operation of a device when clock sources are switched. CONSTITUTION:If switching of clock sources occurs when an FF 21 is set to ''1'', FFs 41-43 are reset through a circuit 29 which supplies a reset signal with an output waveform C of a clock self-FF20, and the clock supply of a #0-side clock supply circuit 27 is made ineffective by an output waveform (d) of the FF 21 at a time t1, and the clock supply from the #1 side is made effective by an output waveform (e) of an FF 22 at a time t3. An output waveform (j) of the FF41 becomes ''1'' at a time t2, and an output waveform (l) of the FF43 becomes ''1'' at a time t6, and an output waveform (h) supplied from a clock supply circuit 47 is made effective at the time t6, and clocks are supplied to the #1 side, and clocks are supplied to the #0 side from an OR gate 28. Thus, the clock supply waveform to the #0 side and the #1 side becomes as shown by (m).
申请公布号 JPS59133622(A) 申请公布日期 1984.08.01
申请号 JP19830007352 申请日期 1983.01.21
申请人 OKI DENKI KOGYO KK;NIPPON DENSHIN DENWA KOSHA;NIPPON DENKI KK;HITACHI SEISAKUSHO KK;FUJITSU KK 发明人 HONDA KENICHI;KAMEI KIMIAKI;ONOZUKA TOMOJI;SAKAMOTO SHIGETOSHI;TACHIKA SHINJI
分类号 G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/04
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