发明名称 MICROPROGRAM CONTROL SYSTEM
摘要 PURPOSE:To shorten the time required for branch processing without increasing the control storage capacity or the number of peripheral circuits, by using a 2- port RAM as a control storage and supplying plural addresses to select one output. CONSTITUTION:Addresses of micro instructions which should be executed in case either the agreement of conditions or the disagreement of conditions are outputted from an address generating circuit AG 32. These addresses are supplied as an address A and an address B of a control storage device CS 31 constituted with the 2-port RAM, and micro instructions corresponding to these addresses are outputted. The operation is terminated while micro instructions are read out from the 2-port RAM, and a branch condition is outputted from an arithmetic and logic unit ALU 33. One of two outputs attained from the RAM 31 is selected in accordance with this condition by AND gates 35 and 37 and an OR gate 38 and is set to a micro instruction register MDR 34. Thus, the time required for the branch processing is shortened.
申请公布号 JPS59133646(A) 申请公布日期 1984.08.01
申请号 JP19830007713 申请日期 1983.01.20
申请人 TOSHIBA KK 发明人 SUZUKI SHIYOUHEI
分类号 G06F9/22;G06F9/26;G06F9/28 主分类号 G06F9/22
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