| 摘要 |
PURPOSE:To facilitate circuit designing, to further integration density, and to increase operating speeds by a method wherein an impurity region electrically short-circuiting a source region and drain region is provided under a gate electrode and the impurity region thus performs as a diffused wiring layer. CONSTITUTION:On an N-type silicon substrate 1, a P-type well region 2, buffer oxide film 21, and silicon nitride film 22 are formed in that order. Then, an openings 23 and 24 are provided.A process follows wherein an N<+> types inversion-preventing layer 4, N<+> type impurity region 15', P<+> type inversion- preventing layer 5, and P<+> type impurity 14' are formed (A). In the next process, a field oxide film 3 and an insulating film pattern 3' are simultaneously formed on the impurity regions 14' and 15' (B). Then, a gate oxide film 6, poly crystalline silicon gate electrodes 72 and 92, polycrystalline silicon wiring layers 71 and 91, N<+> type impurity regions 101-103, and P<+> type impurity regions 81-83 are formed (C). Finally, a CVD-SiO2 film 11 is deposited, a contact hole is provided, an Al wiring layer 12 is formed, and then a PSG 13 is formed to serve as a passivation film (D). |
