发明名称 Serial/parallel input/output bus for microprocessor system
摘要 A single-chip microprocessor device of the MOS/LSI type contains an ALU, several internal busses, a number of address/data registers, and an instruction register with associated control decode or microcontrol generator circuitry. The device communicates with external memory and peripherals by a bidirectional multiplexed address/data bus and a number of control lines. For a given set of addresses parallel data transfers occur and for a different set of addresses serial data transfers occur. A single instruction may transfer one bit, multiple bits in series, or bytes or words in parallel; the serial or parallel mode is specified by the address, so software may be written without regard for the type of interface. This serial/parallel I/O port shares the address/data bus with memory and may be used with any memory-mapped peripheral.
申请公布号 US4463421(A) 申请公布日期 1984.07.31
申请号 US19830517383 申请日期 1983.07.26
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 LAWS, GERALD E.
分类号 G06F13/38;G06F13/42;G06F15/78;(IPC1-7):G06F3/00;G06F13/00 主分类号 G06F13/38
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