发明名称 ANALOG-TO-DIGITAL CONVERTING CIRCUIT
摘要 <p>38/SO 1514 S81P241 ANALOG-TO-DIGITAL CONVERTING CIRCUIT An analog-to-digital converting circuit comprises an input, a clock signal circuit providing first and second clock signals having the same frequency but having a halfcycle phase difference therebetween; first and second analog-to-digital converting stages each having an input coupled to the converting circuit input for receiving an input analog signal, a control terminal for receiving a respective one of the first and second control clock signals, and an output providing an N-bit binary-coded digital signal representing the level of the input analog signal, each having a voltage quantizing interval of .DELTA. V; an output terminal; and a multiplexing circuit, such as a parallel-to-serial converter, for alternately applying to the output terminal the binary coded digital signals of the first and the second analog-to-digital converting stages. In order to achieve greater accuracy, an offset circuit is included to provide to one of the first and the second analog-to-digital converting stages an offset voltage, relative to the other of such stages, of 1/2 .DELTA. V.</p>
申请公布号 CA1171966(A) 申请公布日期 1984.07.31
申请号 CA19810391117 申请日期 1981.11.27
申请人 SONY CORPORATION 发明人 KANEKO, SHINJI
分类号 H03M1/20;H03M1/00;(IPC1-7):H03K13/00;H04N5/92;H04N9/49 主分类号 H03M1/20
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