发明名称 INTER-DEVICE CONTROL SYSTEM
摘要 PURPOSE:To execute quickly a trouble processing, a system, restart, or the like, by discriminating a precedence of control order processings and performing preferetially controls of higher urgency when a peripheral processing device is controlled. CONSTITUTION:The peripheral processing device receives the control order from a central processing unit 1 by a receiving circuit 2. When the peripheral processing device discriminates that the destination of the control order is the peripheral processing device itself, the control order is sent to a first-in first-out buffer circuit 3 and a control order priority discriminating circuit 6, and the discrimination result is reported to a buffer control circuit 4. A shift-in signal is outputted to the buffer circuit 3 if the control order has a low level as the discrimination result; but of the control order has a high level, the shift-in signal is outputted after outputting a reset signal to the buffer circuit 3 to store the control order of a high priority in the beginning of the buffer circuit 3. The buffer control circuit 4 outputs a shift-out signal to the buffer circuit 3 to transmit the control order to a processing circuit 5.
申请公布号 JPS59132027(A) 申请公布日期 1984.07.30
申请号 JP19830005609 申请日期 1983.01.17
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 FUKUI TOSHIMASA;FUJITANI HIROSHI
分类号 G06F13/10;G06F5/06;G06F13/12;G06F13/362 主分类号 G06F13/10
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