| 摘要 |
PURPOSE:To obtain an EPROM memory cell which unnecessitates to take the margin for mask alignment and is fitted to high integration by forming poly Si's of the first and second layers in self-alignment, and forming the first layer poly Si and a field SiO2 in self-alignment. CONSTITUTION:Immediately after forming the first gate oxide film 3 by washing a wafer 1, the first poly Si layer 4 serving as a floating gate is formed. Next, an Si3N4 film 5 acting as the mask for selective oxidation and as the interlayer insulation film for the first and second Si layers is adhered to a thickness of 0.01-0.15mu. Then, an active region is covered with a photoresist film 12, and then the Si3N4 film 5 and the first poly Si layer 4 are removed by etching. Thereafter, the photo resist film 12 is removed after boron ion implantation, and a field SiO2 film 2 is formed at the part from which the Si3N4 film 5 and the first poly Si layer are removed. The second poly Si layer 6 is deposited over the entire surface by leaving the Si3N4 film +SiO2 film on the first poly Si layer 4 as it is. Since the photoetching of a three-layer or a four-layer is performed with the same mask in this manner, a control gate 6' and the floating gate 4' can be formed in self-alignment. |
