发明名称 DECODER CIRCUIT
摘要 PURPOSE:To improve the integrating density on an IC by inputting m-set of inputs among n-set of inputs to an NAND circuit so as to form OR of input signals of opposite phase and obtaining a decoder output of AND between its output and remaining (n-m)-set of inputs. CONSTITUTION:An address coder circuit selects m-set of signals from n-set of address input signal lines and inputs the signals to an m-input NAND circuit 3 so as to form OR among input signals of opposite phase to the address input signals, and the logical sum and the remaining (n-m)-set of address input signals are inputted to an NOR circuit 4 of (n-m+1) inputs for obtaining a required decoder output signal. Thus, the integrating density on the integrated circuit is improved.
申请公布号 JPS59128830(A) 申请公布日期 1984.07.25
申请号 JP19830002834 申请日期 1983.01.13
申请人 OKI DENKI KOGYO KK 发明人 TAKEDA TAKASHI
分类号 H03K19/20;H03M7/00 主分类号 H03K19/20
代理机构 代理人
主权项
地址