| 摘要 |
PURPOSE:To permit data memory access even in case of the disconnection of a line by providing a hit detecting circuit, oscillator which generates a control signal, and a memory control signal switching circuit. CONSTITUTION:If abnormality, etc., of a transmission line causes a hit of serial receive data 11, the hit detecting circuit 6 detects that and holds a hit detection signal 61 at a high level to operate a switching control circuit 7, holding circuit 9, and selecting circuit 5. Then, external equipment accesses a common memory by a memory control signal 82 generated by the oscillation clock 31 of the oscillator 3. Then, when the transmission line is returned to normal, the signal 61 of the circuit 6 goes to a low level and the circuits 7, 9, and 5 operate, so that the data memory returns to operation under the control of a control signal 51 generated by a regenerated clock 12. |
