发明名称 RECEIVING SYSTEM OF DIGITAL MULTI-FREQUENCY SIGNAL
摘要 PURPOSE:To decide an output with no mistake by using the result obtained during a discrete Fourier conversion for an input digital signal and deciding whether or not the noises, etc. are received. CONSTITUTION:When a discrete Fourier conversion is started, the output of an adder 13 is latched by a signal latching circuit 17 every time an input signal is supplied. Then, when a succeeding input signal is supplied a comparison arithmetic circuit 18 compares the output of the circuit 17 with the present output of the adder 13. When the latter output is larger than the former output, it is decided that the result signal of a signal detecting stage 14 is proper. Thus no control is given to the signal pass. If the latter output is equal to or smaller than the former output, the result signal of the stage 14 is suppressed since the noises, etc. are possibly received.
申请公布号 JPS59125188(A) 申请公布日期 1984.07.19
申请号 JP19820232239 申请日期 1982.12.30
申请人 FUJITSU KK 发明人 HATANO TAKASHI;OGAWA YASUNORI;TANAKA YASUO;SHIMOZONO RIYOUJI;SEKI YOUKO
分类号 H04L27/26;H04Q1/457 主分类号 H04L27/26
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