| 摘要 |
<p>A memory address translation (14) and access control system (16) for performing dual functions. The functions include the translation of virtual CPU generated memory addresses into real memory addresses and the controlling of certain memory functions such as journalling. The address translation function comprises two steps, the first comprising converting the virtual address into a second virtual address or effective address and second, the step of converting the effective address into a real memory address. A set of translation tables (14) contain current effective to real address translations. The translation tables (14), referred to herein as translation look-aside buffers or TLBs (14), are addressed using a subset of the effective address. The contents of the addressed TLB (14) are examined for a match with the effective address. If a match does not occur then the page frame tables stored in main memory are accessed and searched for the desired effective address. A special data field (lock bits) is provided in both the TLBs (14) and the page frame tables. In this field, a bit is provided for each line in the reference page at a given effective to real address translation. These bits may be used to indicate when a line of data has been accessed or altered. </p> |
