发明名称 Improved Josephson junction memories.
摘要 <p>A Josephson junction memory employs memory cells each of which includes only one Josephson junction for writing, together with another in the sense line for reading, and which does not require bipolar control currents or an initializing operation different from the normal write operation. <??>Each cell comprises a ground plane pattern (105) on which is deposited a left branch line (107) connected to the counter electrode (108) of the Josephson junction and a right branch line (106). A base electrode line (113) is connected to the base electrode (109) of the Josephson junction and to the junction point (114) of the conductor (116). Leads (117) and (118) provide for the flow of bias current through the loop so formed, and x and y control lines (115, 116) are inductively coupled to the Josephson junction. An aperture in the ground plane layer (105) surrounding the region of the Josephson junction ensures that the control lines (115, 116) are coupled directly to the Josephson junction, but that there is no inductive coupling through the ground plane; this enables symmetrical operation to be obtained using only a single Josephson junction for the write gate in each memory cell.</p>
申请公布号 EP0113531(A2) 申请公布日期 1984.07.18
申请号 EP19830307319 申请日期 1983.12.01
申请人 SPERRY CORPORATION 发明人 WANG, TSING-CHOW, DR.;JOSEPHS, RICHARD MICHAEL, DR.
分类号 G11C11/44;H01L39/22 主分类号 G11C11/44
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