发明名称 MIS TYPE FIELD EFFECT SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain an FET, wherein a threshold voltage is not dhanged during the operation even though the size of each part is proportionally reduced, by making the work function of a material on the drain side larger than that on the source side, thereby constituting a gate electrode. CONSTITUTION:On a p type Si substrate 16, n<+> source and drain 14 and 15 and an insulating film 13 are provided as usual, and a gate electrode is formed by poly Si. B ions are implanted in the entire area of the gate electrode. Then, with a p<+> type gate electrode part 12 as a mask, As ions are implanted, and an n<+> type gate electrode part 11 is formed. In this constitution, since the conduction band level of the electrode 12 in the vicinity of drain 15 is increased by about 1eV than the electrode 11 in the vicinity of the source 14, a voltage, which is applied to the gate insulating film 13 in the vicinity of the layer 15, is decreased by 1eV. Therefore the injection electric field in the vicinity of the layer 15 is lowered, and the injection of hot electrons is suppressed. Since the gate electric field at the lower gate voltage is oriented in the repelling direction of the electrons, the injection is further suppressed. In this case, a channel is formed on the source side. Thus Vth is not changed during the operation even though the device is made compact.
申请公布号 JPS59124161(A) 申请公布日期 1984.07.18
申请号 JP19820229259 申请日期 1982.12.29
申请人 FUJITSU KK 发明人 TSUCHIYA SHINPEI
分类号 H01L27/10;H01L29/49;H01L29/78 主分类号 H01L27/10
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