SEMICONDUCTOR SUBSTRATE WITH TEST DEVICE

摘要

A test element for determining the origin and density of device defects arising during the fabrication of integrated circuit wafers features a plurality of test site structures each of which corresponds to a step in the integrated circuit fabrication process. Following fabrication of a structure, it is masked against further process steps. The multiple structure thereby permits isolation and association of device defects with the process step of origin. The use of the multiple test structures enables arising defects to be subjected to the entire temperature cycle of the process. This provides simulation of defect aggravation caused by the process temperature cycle. Single pass testing occurs because metallization is brought to the top level of the device.