发明名称 CASH MEMORY CONTROL
摘要 <p>The method for controlling a single physical cache memory (42) to provide multiple virtual caches in a data processing system including a host processor (10), a data file (16) in which are stored pages of data which may be retrieved by the host processor (10), and I/O controller (20) which controls the transfer of requested data between the host processor (10) and the file (16), consists in dividing the single physical cache memory (42) into a plurality of virtual caches, one of the virtual caches being associated with each of multiple data processing tasks being performed by the host processor (10), and transferring from the file (16) into each of the virtual caches, predetermined amounts of data for at least some requests for data from the file (16) for the associated processing task.</p>
申请公布号 JPS59123952(A) 申请公布日期 1984.07.17
申请号 JP19830216452 申请日期 1983.11.18
申请人 INTERN BUSINESS MACHINES CORP 发明人 JIERII DEYUAN DEIKUSON;JIERARUDO ARAN MARAZASU;JIERARUDO URURITSUCHI MAAKERU;ANDORIYUU BOISU MAKUNEIRU
分类号 G06F12/08 主分类号 G06F12/08
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