发明名称 TRANSMITTING AND RECEIVING SYSTEM OF CONTROL INFORMATION
摘要 PURPOSE:To miniaturize an exchange and to reduce the installation cost by tranferring control information between a central controller and a peripheral processor corresponding to a channel device via a common buffer memory. CONSTITUTION:When the control information is transmitted from the central controller 1 to an optional peripheral processor 10k, transmission control information is written in a buffer memory 5 for transmission via a data bus 2. Then, the controller 1 transmits the designation number of the processor 10k and a read permission signal to gate circuits 400-40n via control bus 3. Thus, the circuit 40k is operative, and the transmission of the control information from the controller 1 to the processor 10k is finished by reading the transmission control information of the memory 5 via the circuit 40k and the peripheral data bus 4 from the processor 10k. On the other hand, when the controller 1 receives the control information from an optional peripheral processor 10l, it is performed via a receiving buffer memory 6.
申请公布号 JPS59123393(A) 申请公布日期 1984.07.17
申请号 JP19820229991 申请日期 1982.12.29
申请人 NIPPON DENKI KK 发明人 YAMAMOTO MASAHIKO
分类号 H04Q3/545 主分类号 H04Q3/545
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