发明名称 SORTING PROCESSOR
摘要 PURPOSE:To sort a large quantity of data with high efficiency by means of plural keys by providing inverters to the input and output parts of the main body of a sorting processor. CONSTITUTION:The main body 1 of a sort processor is constituted by cascading plural processors 4i containing the 1st and 2nd memories 2i and 3i (i=1-n). The processor 4i of each stage compares mutually the data which are stored alternately to the memories 2i and 3i in accordance with the input order and then delivers these data after rearranging them in the prescribed sorting direction. Inverters (IVs) 5 and 6 are provided at the input and output parts of the main body 1 respectively. The data are applied with plural connected keys, and one of keys shows the ascending sort with other keys showing the descending sort, respectively. In such a case, the IV 5 inverts the value of keys so that all sorting directions are ascending. Thus the sorting directions of keys are put in order. The main body 1 inverts again the value of keys through the IV 6 and then resets them to the original key value for the keys set in order and to the result of the sorting process.
申请公布号 JPS59123048(A) 申请公布日期 1984.07.16
申请号 JP19820233427 申请日期 1982.12.28
申请人 TOSHIBA KK 发明人 KOYANAGI SHIGERU;IWATA KAZUHIDE
分类号 G06F7/24;(IPC1-7):06F7/24 主分类号 G06F7/24
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