发明名称 REDUCING METHOD FOR RESIST COATING THICKNESS ON ALIGNMENT MARK
摘要 PURPOSE:To contrive improvement in the accuracy of overlapping by reducing or preventing resist coating by forming a pattern which obstructs the flow of a resist on the axis line where the resist flows to an alignment mark. CONSTITUTION:A pattern 3 for obstructing the flow of a resist is provided near an alignment mark 2 formed on a wafer 1. The pattern 3 has a projecting wedge shape to the direction of the flow of the resist and is made by dry-etching a silicon substrate itself as it is. The pattern 3 and the alignment mark 2 are placed on the wafer 1 and if the specimen is spin-coated, the quantity of the flow of the resist toward the alignment mark 2 is reduced by the pattern 3, the flow amount of the resist on the alignment mark 2 is reduced and the accuracy of overlapping can be improved.
申请公布号 JPS6279620(A) 申请公布日期 1987.04.13
申请号 JP19850219260 申请日期 1985.10.03
申请人 OKI ELECTRIC IND CO LTD 发明人 KIMURA YASUKI
分类号 H01L21/68;G03F9/00;H01L21/027;H01L21/67 主分类号 H01L21/68
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