发明名称 DIGITAL SIGNAL REGENERATING CIRCUIT
摘要 PURPOSE:To attain correct DC regeneration while suppressing low frequency noise by adding positive and negative DC voltages to an input signal and passing the added signal through a time constant circuit. CONSTITUTION:The input signal is divided into three; one is added with a DC voltage of +E at an adder 11 and the remaining two signals are added with a DC voltage of -E at an adder 12. Each output of the adders 11, 12 is applied respectively to the time constant circuits consisting respectively of a capacitor 17 and a resistor 19, and a capacitor 18 and a resistor 20. The time constant circuits supply an output to the adder as positive and negative envelope signals. The output of the adder 21 is attenuated to 1/2 and the result is subtracted from the input signal. Then, even if the amplitude of low frequency noise is larger than that of the input signal, the signal regeneration is performed accurately by the correct DC regeneration.
申请公布号 JPS59122138(A) 申请公布日期 1984.07.14
申请号 JP19820229450 申请日期 1982.12.28
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KITAGAWA HIDEMASA
分类号 H04B3/06;H04B3/14;H04L25/06 主分类号 H04B3/06
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