发明名称 |
Integrated injection logic semiconductor devices |
摘要 |
The integrated injection logic semiconductor device comprises an N type semiconductor substrate, a P type semiconductor layer laminated on the N type semiconductor substrate, a first N type region extending through the P type semiconductor layer to reach the N type semiconductor substrate, a P type region formed in the first N type region and having a periphery along the outer periphery of the first N type region and a second N type region formed in the P type semiconductor layer. The integrated injection logic semiconductor device is constituted by a PNP lateral transistor utilizing the P type region, the first N type region and the P type semiconductor layer as the emitter, base and collector electrodes respectively, and a NPN vertical transistor utilizing the N type semiconductor substrate, P type semiconductor layer and the second N type region as the emitter, base and collector electrodes, respectively.
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申请公布号 |
US4459606(A) |
申请公布日期 |
1984.07.10 |
申请号 |
US19750644296 |
申请日期 |
1975.12.24 |
申请人 |
TOKYO SHIBAURA ELECTRIC CO., LTD. |
发明人 |
TOKUMARU, YUKUYA;NAKAI, MASANORI;SHINOZAKI, SATOSHI;NAKAMURA, JUNICHI;ITO, SHINTARO;NISHI, YOSHIO |
分类号 |
H01L27/082;H01L21/331;H01L21/8226;H01L27/02;H01L29/73;(IPC1-7):H01L27/04;H03K19/09 |
主分类号 |
H01L27/082 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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