发明名称 Absolute magnitude circuit
摘要 An absolute magnitude circuit is provided wherein an input signal is fed to one input of a differential amplifier circuit, the output of such amplifier circuit being coupled to a second input thereof through a negative feedback loop, such feedback loop having two output terminals with an inverter coupled therebetween; and a switching circuit, responsive to the polarity of the input signal, for coupling a selective one of the pair of output terminals to an output of the absolute magnitude circuit, with the voltage at the output of the absolute value circuit having the same polarity independent of the polarity of the input signal. With such arrangement, since the input circuitry to the operational amplifier is independent of the polarity of the input signal, the gain and biasing of the absolute magnitude circuitry is independent of input signal polarity.
申请公布号 US4459493(A) 申请公布日期 1984.07.10
申请号 US19820450834 申请日期 1982.12.17
申请人 RAYTHEON COMPANY 发明人 MOORE, BRUCE D.
分类号 G01R19/22;G06G7/25;(IPC1-7):H03K5/20;H03K5/00 主分类号 G01R19/22
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