发明名称 CONTROLLING SYSTEM OF COMPETITIVE PROCESSING REQUEST
摘要 PURPOSE:To prevent undesired processing due to program mistake by informing occurrence of competition of processing request to a microprogram in response to an output signal of a processing request controlling circuit device and a writing controlling signal to a memory device. CONSTITUTION:When a V-Reg (abbreviation of register) writing controlling signal which is a memory device of program call request PCR code is generated, a signal appears in output of an AND gate 6. Then, the code on a bus 9 is stored in the V-Reg 8, and at the same time, a suppress PCR flag circuit 5 is turned on. Up to this time, no output signal appears from an AND gate 10. After this, if a V-Reg writing control signal is generated by mistake in response to processing request from other running level of the program, output is generated in the gate 10. This output signal is detected as program check, and reported to a microprogram as an error.
申请公布号 JPS59119448(A) 申请公布日期 1984.07.10
申请号 JP19820228372 申请日期 1982.12.27
申请人 FUJITSU KK 发明人 IBE HISASHI
分类号 G06F9/26;G06F9/22;G06F9/42 主分类号 G06F9/26
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