| 摘要 |
PURPOSE:To prevent latchup by providing a CMOS logical circuit forming an output signal and a CMOS gate circuit turning off an output transistor (TR) at timing change through the use of this signal and a delay signal. CONSTITUTION:An IC consists of an internal logical block comprising the CMOS circuit and an output section including a bipolar output TR. The output section is constituted in the following. That is, one input and one output of NAND gate circuits G1, G2 are connected mutually in crossing to form a latch. A signal in is applied to the other input of the circuit G1 as it is, and an inverting signal formed by the signal in through an inverter IV3 is applied to the other input of the circuit G2. Outputs A, B of the circuits G1, G2 are applied to the base of totem pole push-pull output TRQ1, Q2 through inverters IV4, IV5. |
