发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To obtain a logical circuit having a small chip area only with normally ON type by providing an FET acting like a current source by giving a common constant potential to a gate from a bias circuit between a source and a negative power supply of the FET of a buffer circuit. CONSTITUTION:In a logical circuit where the source of FETQ19, Q22 having Schottky gate is connected in common and each drain is connected to the gate of FETQ21, Q22 being the buffer circuit, FETQ23, Q24, Q25 acting as the current source are connected by connecting gates in common and giving a constant voltage from a bias circuit between the source of the FETQ19, Q22 connected in common and the negative power supply, and between the FETQ21, Q22 of the buffer circuit and the negative power supply. Since all the FETs are constituted by the normally ON type only and a resistor having a large resistance value is not required, the logical circuit with simple process and small chip area is obtained.
申请公布号 JPS59117326(A) 申请公布日期 1984.07.06
申请号 JP19820225065 申请日期 1982.12.23
申请人 TOSHIBA KK 发明人 SHIMIZU SHIYOUICHI;KAMAYA YUKIO
分类号 H01L27/08;H03K19/094;H03K19/0952 主分类号 H01L27/08
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