发明名称 MEMORY USING MULTIPLEXED ROW AND COLUMN ADDRESS LINES
摘要 <p>A memory of rows and columns of memory cells uses a multiplexed input address buffer (14) having output row-column address lines (RCA1 ... RCAM) which are coupled to a multiplexer (20) and to column decoders (16). The multiplexer is coupled to row address decoders (18) and serves to selectively couple the address lines to the row decoders. The address lines typically first carry row address information and then column address information. The use of a common portion of the address lines to couple the address buffer to the column decoders and multiplexer tends to reduce the overall size of the memory and thereby increases yield and reduces cost. </p>
申请公布号 WO1984002608(A1) 申请公布日期 1984.07.05
申请号 US1983001833 申请日期 1983.11.21
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