| 摘要 |
<p>PURPOSE:To perform secure control over competition in the execution of signal processor instructions and to improve the processing efficiency of a system by providing a signal processor instruction control bit in the control register of every system. CONSTITUTION:Control bits 2 and 5 in control registers 1 and 4 represents a signal processor instruction control bit SIGP BUSY. When the high priority computer of a system 0 sends an instruction SIGP to the low priority computer of a system 1, its microprogram mu1 is started. When the computer of the system 1 sends the instruction SIGP to the computer of the system 0, the bit SIGP BUSY of the high priority computer of the other system is checked firstly. When the bit is off, it is judged that there is no competition, and the instruction SIGP of its system is presumed as effective and executed. Thus, the control bit is provided in the control register of each system to perform the secure control over competition, improving the processing efficiency of the system.</p> |
