发明名称 ABSOLUTE VALUE CIRCUIT
摘要 PURPOSE:To set the origin of an output level and to stabilize the operation of a circuit by providing feedback from an intermediate voltage between two outputs of a differential amplifier and varying the emitter-side or collector-side source voltages of transistors (TR) which constitute the differential amplifier. CONSTITUTION:Resistances 25 and 26 having the same value are connected to the collectors of TRs 11 and 12 which constitute the 1st differential amplifier of an absolute value circuit, and the base of an emitter follower TR15 is connected to the common connection point between those resistances 25 and 26. The output of this TR15 is applied to the base of a TR16 which constitutes the 2nd differential amplifier, whose output is applied to the base of a TR18 through the emitter of a TR17; and this TR18 is connected between the emitters of the TRs 11 and 12, and a negative voltage -V. Then, the intermediate voltage between two outputs of the 1st differential amplifier is fed back to the TRs 11 and 12 to vary the emitter-side source voltage, and the origin of the output level is set and outputted through TRs 13 and 14 which constitute an emitter follower to stabilize the operation of the circuit.
申请公布号 JPS59116878(A) 申请公布日期 1984.07.05
申请号 JP19820226040 申请日期 1982.12.24
申请人 HITACHI SEISAKUSHO KK 发明人 SASAKI HIROYASU
分类号 G06G7/25;(IPC1-7):06G7/25 主分类号 G06G7/25
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