发明名称 System for processing machine check interruption.
摘要 A system processing machine check interruption using a data processor with outputs a machine check interruption signal by detecting the generation of a machine check condition and which performs interruption processing on the basis of the machine check interruption signal. The data processor comprises a specific code detector means (15) which detects a specific interruption signal among the machine check interruption signals, a signal converting means (13, 17) for converting the machine check interruption signal into a modified code signal when the interruption signal is the above-mentioned specific code, and a control portion (20) which assumes a disabled-waiting condition in response to the modified code signal, the operation of the data processor hence being stopped when the above-mentioned specific interruption signal occurs.
申请公布号 EP0112672(A2) 申请公布日期 1984.07.04
申请号 EP19830307470 申请日期 1983.12.08
申请人 FUJITSU LIMITED 发明人 MATSUMOTO, TOSHIO;KATO, MOTOKAZU
分类号 G06F11/00;G06F11/07 主分类号 G06F11/00
代理机构 代理人
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