发明名称 |
Adaptive phase lock loop |
摘要 |
An apparatus for processing an information signal representative of information and containing phase error. The apparatus includes a detector for detecting the information in the signal and an error signal generator for generating an error signal representative of the error. A phase lock loop makes corrections which tend to reduce the phase error. The gain of the phase lock loop is adjusted in accordance with the error signal to optimize system performance.
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申请公布号 |
US4458355(A) |
申请公布日期 |
1984.07.03 |
申请号 |
US19810272707 |
申请日期 |
1981.06.11 |
申请人 |
HYCOM INCORPORATED |
发明人 |
MOTLEY, DAVID M.;SALMAN, NAIF D. |
分类号 |
H04L27/227;H03G3/20;H03L7/08;H04L27/38;(IPC1-7):H03K13/32 |
主分类号 |
H04L27/227 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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