Control of page storage among three media using a single channel processor program and a page transfer bus

摘要

Digital error correcting circuitry is disclosed which processes two analog output signals from an incremental position optical encoder to correct for both offset and amplitude errors. The peak amplitude values of the analog signals are stored in a digital storage register and are used to calculate bias signals of the proper polarity and amplitude to cancel the offset errors in each of the encoder signals. The peak amplitude values are also used to generate an amplitude correction factor which is applied to one of the encoder signals to correct the peak-to-peak amplitude of that signal so that it is equal to the peak-to-peak amplitude of the other encoder signal.