发明名称 MULTIPLEX TRANSMITTER
摘要 PURPOSE:To transfer data in a start-stop synchronizing system and to increase the multiplex degree with use of an asynchronous transmitter/receiver, by using the half of data characters of even number of bits as effective data, and making the other half inverted to be used into a series frame, and inserting a synchronous frame to the tip of the series frame. CONSTITUTION:The signals of four multiplexers 8 are applied to half of the input port of a transmitting UART1 of a general-purpose synchronous transmitter/ receiver UART; while the signals inverted by an inverted synchronous signal generator 9 are applied to the other half of the input port respectively. The frame transferred to a transmission line 3 from the UART1 is formed into a series frame of a start bit 4, a data 12, an inverted data and a stop bit 7. The signal of the series frame is received by a receiving UART2, and the synchronism of characters is obtained. Then the signal is delivered from an output port in the form of a parallel data containing the inverted data. This parallel data is processed by an inverted synchronous signal detector 10 and four decoder multiplexers 11. Then the transmitter/receiver of UART is used to increase the multiplex degree.
申请公布号 JPS59114938(A) 申请公布日期 1984.07.03
申请号 JP19820225268 申请日期 1982.12.21
申请人 HITACHI DENSEN KK 发明人 OKADA SHIGEO
分类号 H04L25/38;H04L5/22;H04L5/24 主分类号 H04L25/38
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