| 摘要 |
PURPOSE:To decrease the number of elements of an arithmetic device which calculates the interpolation digital data and to reduce the occupied area for IC formation, by having a serial transfer of the digital data. CONSTITUTION:The digital data fed from a sound synthesizer 21 is applied serially to a full adder 24, and at the same time the digital data stored in a shift register 28 is also applied to the adder 24. The arithmetic result of the adder 24 is stored in a shift register 23, and the half value of the memory contents of the register 23 is extracted and supplied serially to the adder 24. The arithmetic result of the adder 24 is also stored in the register 28, and the memory contents of the register 28 are supplied to a register 26 and then converted into analog signals by a D/A converter 27. Thus the number of elements can be decreased for a full adder, i.e., an arithmetic device and the occupied area can be reduced when a D/A converter is formed into an IC. |
