发明名称 INPUT/OUTPUT CIRCUIT OF MICROCOMPUTER
摘要 PURPOSE:To prevent a malfuncion caused by disturbance by setting a flag when an input/output port is in an input mode, outputting an OR output with an output latch through an output driver, and outputting an abnormality signal when the output latch and a value of the flag are different each other. CONSTITUTION:Plural output data 1 are latched to an output latch 2 by a latch clock 3, and a level 1 is written. An input mode flag 10 is set to the level 1 by an input mode setting signal 11. The latch 2 and the flag 10 output ''1'', it becomes an input data signal 6 through an OR circuit 13 and an output driver 4, and it is sent into a data bus which is not shown in the figure. When the input mode flag is ''1'', if at least one of the output latches 2 is reduced to ''0'', an input mode abnormality detecting part 14 output 15 an abnormality signal. By this abnormaity signal, an interruption is applied to a mu computer, and a reset processing program from a fault is executed. In this way, a malfunction caused by disturbance, etc. of an input/output circuit of the mu computer can be reduced easily.
申请公布号 JPS59114621(A) 申请公布日期 1984.07.02
申请号 JP19820225339 申请日期 1982.12.21
申请人 MATSUSHITA DENKI SANGYO KK 发明人 SAKAO TAKASHI
分类号 G06F13/00;G06F11/07 主分类号 G06F13/00
代理机构 代理人
主权项
地址