| 摘要 |
PURPOSE:To operate normally a high speed operating element by a simple circuit by obtaining a READY signal of the high speed operating element by AND of a one-shot multivibrator output triggered by a chip select signal, and a wait signal. CONSTITUTION:A READY signal generating circuit 14 is constituted of one one- shot multivibrator and one AND gate 16. The one-shot multivibrator 15 is triggered by a leading edge of a chip select signal CS of a high speed operating element 12, outputs a pulse having a fixed width determined by an external resistance R1 and a capacitor C1, and it appears in a terminal Q. The AND gate 16 gains logical OR of a Q output signal of the one-shot multivibrator 15, and a wait signal (pause) generated by the high speed operating element 12, and its output becomes a READY signal to a CPU11. |
