| 摘要 |
The display device is comprised of a multiplexer (MPX1), a CRT controller (CRTC1), a character generator (CG1), a parallel-series converter (SPL1), a CRT monitor signal control circuit (CRMC1), a dot-clock generator (DOTC1), a character adress slector (RAS1), and dividers (DV1) (DV2) (DV3). In the device, the vertical and horizontal magnification data are stored in the memories (AMM) (VMM); the data stored in horizontal magnification memory (HMM) determines the diminution rate of the dividers (DV1) (DV2) |
