| 摘要 |
PURPOSE:To enable to realize via-hole structure as an electrode earthing system stably and having favorably yield during the semiconductor element manufacturing process by a method wherein the element electrode formation process, the thin layer substrate formation process, the penetrating hole formation process and the chip formation process are provided. CONSTITUTION:The mesas 3 of an FET are distributed on a GaAs semi-insulating substrate 2 to be provided with an active layer 1. An SiO2 film 4 is coated on the substrate thereof, a photo resist 5 is applied thereon, and patterning 6 for opening of holes of several pieces is performed extending over the whole surface of the substrate. The GaAs crystal of the opening part is etched to form an opening 7. After the photo resist film is removed, the respective electrodes of a source 8, a drain 9 and a gate 10 are formed according to the mesa 3. The substrate thereof is adhered 12 to an Si substrate 11, and lapping of the back is performed according to Al2O3 powder to form a thin layer. Penetrating holes to the desired electrodes are formed from the back of the substrate. GaAs of the resist opening part is removed according to an etching liquid to form a via-hole 15. After the photo resist film is removed, a metal layer and an Au layer to be positioned thereon are formed. Patterning 16 of the photo resist for selective plating is performed to the back of the substrate. |
