发明名称 AIS DETECTING CIRCUIT
摘要 PURPOSE:To discriminate between an AIS signal and data and to detect securely the AIS signal at a high speed by counting ''0'' frame signals which are inserted alternately with ''1'' and ''0'' for every frame signal for a period of at least seven frames. CONSTITUTION:Normally, ''1'' and ''0'' are inserted alternately as frame signals into respective frames F of a PCM signal (a). Therefore, even all ''1'' data contains three ''0''s in the period T of at least seven frames. For this purpose, ''0''s in the signal (a) are detected by a detection part 10 and counted by a counter 11, whose counted contents are applied to a decision part 13 to decide on whether the signal (a) is an AIS signal or not. Even if an error of transmission inverts some ''0'' frame signal to ''1'', but three ''0''s are not all inverted, so the contents of the counter 11 are >=2 and the AIS signal all consists of ''1''s including frame signals, so the decision part 13 discriminates securely between data and the AIS signal.
申请公布号 JPS59112743(A) 申请公布日期 1984.06.29
申请号 JP19820223373 申请日期 1982.12.20
申请人 FUJITSU KK 发明人 WAKABAYASHI TAKASHI;MURASE TETSUO;FUJIMOTO HISANOBU
分类号 H04L25/02;H04J3/14 主分类号 H04L25/02
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