发明名称 DETECTING SYSTEM FOR ABNORMAL ACCESS OF MEMORY
摘要 PURPOSE:To detect easily the various abnormal access of a memory by using an RAM to be written by a CPU, as the memory block managing memory of the memory. CONSTITUTION:A write inhibiting, a read-out inhibiting and a fetch inhibiting flags, etc. are written through a CPU P in accordance with a block in each area of a managing memory 10 formed by an RAM corresponding to an address of each block of a memory 1. In this state, the memory 10 is accessed through an address decoder 11, and when it coincides with the sorted contents of a control signal passing through a control bus 2 in a sub-data bus controller 12, the present access is decided to be the access of the inhibited block to apply an interruption signal to the CPU P from the controller 12. The various abnormal access of the memory can be detected easily by a system using a managing RAM, without using the managing switch, the managing latch, etc.
申请公布号 JPS59112497(A) 申请公布日期 1984.06.28
申请号 JP19820220734 申请日期 1982.12.16
申请人 FUJI DENKI SEIZO KK 发明人 MINE HIRONORI
分类号 G06F12/16;G06F12/14;G06F21/24;G11C29/04 主分类号 G06F12/16
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