发明名称 IC MEMORY
摘要 <p>PURPOSE:To execute easily and exactly a replacement to a low speed IC memory from a high speed IC memory by selecting an NOT-OR circuit for buffering high speed and low speed output signals respectively, through a buffer/invertor circuit. CONSTITUTION:In accordance with turn-off and turn-on of a switch SW, an output of a buffer/invertor BUFF/INV is varied, an NOT-OR circuit NOR1 or NOR2 for a memory cell array is selected. Subsequently, a high speed output signal is buffered through the circuit NOR1, and a low speed output signal is buffered through the circuit NOR2 for connecting a delay inverter INV is buffered. In this way, a high speed IC memory is replaced with a low speed IC memory easily and exactly.</p>
申请公布号 JPS59112489(A) 申请公布日期 1984.06.28
申请号 JP19820220652 申请日期 1982.12.16
申请人 FUJITSU KK 发明人 OOE GIICHI
分类号 G11C11/41;G11C11/34;(IPC1-7):11C11/34 主分类号 G11C11/41
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