发明名称 ELECTRONIC COMPUTER SYSTEM
摘要 PURPOSE:To convert easily an address in accordance with the specification of a program by providing a titled device with a rewritable table describing the relation between physical and logical addresses and a means for converting both the addresses. CONSTITUTION:When an I/O instruction is started, an I/O processor reads out unit controlling words UCWs. At the reading, a channel address and an I/O device address are set in registers 11, 12 and the leading UCW corresponding to the specified I/O is read out and set in a subchannel memory register SBCR14. The CUW set in the SBCR14 stores the address of a physical I/O device which corresponds to the logical I/O device address. Therefore, the I/O processor can convert the logical I/O device address into the physical I/O device address by starting a channel by the physical I/O device address. Thereafter, the UCWs are accessed by using the logical addresses set in the registers 11, 12.
申请公布号 JPS59112325(A) 申请公布日期 1984.06.28
申请号 JP19820223577 申请日期 1982.12.20
申请人 HITACHI SEISAKUSHO KK 发明人 SATOU HIROAKI
分类号 G06F13/12;G06F3/00;G06F13/14;G06F15/16;G06F15/177 主分类号 G06F13/12
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