| 摘要 |
<p>PURPOSE:To obtain a storage circuit which attains fast access by adding a means which transfers input/output information between the outside and a memory cell having an address corresponding to a point near a memory cell corresponding to a point in an address space indicated by an address signal. CONSTITUTION:For example, X and Y address signals AX and AY are supplied externally and the numbers indicated by those signals are ax and ay. Then, the number indicated by the high-order seven-bit signal A'X of the AX is denoted as a'x and the number indicated by the low-order two-bit signal A''X of the AX is denoted as a''x, so that ax=4a'x+a''x. When a''x is 1 or 2, phiS0 and phiS3 are both at low potentials and phi'S0 and phi'S3 are both at high potentials. In an RS0, RS1, RS2, and RS3, SRj and WLj are connected electrically, and RD included in the RS0, RS1, RS2, and RS3 hold SRa'x at a high voltage, so the WLa'x of MA0, MA1, MA2, and MA3 is driven at a high voltage. On the other hand, CS0 connects the bit line BLaY to D0, and CS1, CS2, and CS3 connect bit lines BLaY of the MA1, MA2, and MA3 to D1, D2, and D3, BLaY-1 to D1-, D2-, and D3-, and BLaY+1 to D1+, D2+, and D3+.</p> |
