| 摘要 |
PURPOSE:To perform data transfer among memory banks efficiently and speedily through simple, inexpensive hardware by allowing a CPU to handle different split areas of the memory banks as continuous addresses. CONSTITUTION:Bank selecting circuits 103U and 103L receive segment specifying signals S1 and S2 from the CPU individually according to an SEL specifying signal, and specify every memory bank (101i and 101j) as an upper side U or lower side L individually according to the contents of the segment specifying signals S1 and S2. Thus, the memory banks 1011, 1012-101n are divided and used selectively at the same time to share or transfer a large quantity of data, subroutines, etc., among the segments efficiently. Further, an adequate place of a bank is utilized as a working area. |
