发明名称 CONTROL SYSTEM
摘要 PURPOSE:To simplify constitution and to reduce the number of connection lines by outputting control signals for the necessary duration of each relay operation and duration shorter than the necessary duration of relay operation from a processor when a latching relay is driven and when a signal is led out of a signal source. CONSTITUTION:When the address in a control signal led out to the control line 5 of a processing circuit 1 coincides with the address set in an address setting circuit 8, the circuit 8 sends a H-level signal to a decoder 6 and a multiplexer MPX7. The decoder 6 drives a driving circuit 9 corresponding to the address in the control signal individually to operate the latching relay 10. At this time, a control signal which has duration longer than the time reguired for the operation of the relay 10 is led out of the processing circuit 1. The MPX7 selects one of signals from the signal source 20 and inputs it to the device 1 through an input signal line 18. At this time, the selection signal of the MPX7 having duration shorter than the necessary time of the operation of the relay 10 is led out of the device 1.
申请公布号 JPS59109903(A) 申请公布日期 1984.06.25
申请号 JP19820220646 申请日期 1982.12.15
申请人 MATSUSHITA DENKO KK 发明人 MATSUBARA YUUSAKU
分类号 G05B19/05 主分类号 G05B19/05
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