发明名称 COMPLEMENTARY MOS INTEGRATED CIRCUIT
摘要 PURPOSE:To attain low power consumption by shifting a reference voltage by a threshold voltage of an MOS transistor (TR), inputting it to a gate of a source follower circuit so as to increase the restoring force to an output fluctuation. CONSTITUTION:A reference voltage generator 6 generates a reference voltage VR in response to the impedance ratio of resistors 7a, 7b. If the reference voltage is dropped to a VR-VTHn (threshold voltage) or below because of the fluctuation of the power supply voltage and the reference voltage VR, since the 1st n-MOS TR9 is conductive, the restoring force in the increasing direcdtion up to the reference voltage output VR-VTRn of a reference voltage output line 4 is operated. When the reference voltage output is increased to a value of VR-VTHp (threshold voltage) or over, the 1st p-MOS TR10 is conductive and the reference voltage output of the reference voltage output line is subject to the restoring force in the decreasing direction to VR-VTHp. Thus, the reference voltage output is controlled to a value of VR-VTHn or over and VR-VTHp or below. Thus, the low power consumption is attained.
申请公布号 JPS59108425(A) 申请公布日期 1984.06.22
申请号 JP19820219972 申请日期 1982.12.13
申请人 MITSUBISHI DENKI KK 发明人 SHINOHARA HIROSHI;ICHINOSE KATSUKI
分类号 G05F3/24;H03K17/687;H03K19/00 主分类号 G05F3/24
代理机构 代理人
主权项
地址
您可能感兴趣的专利