PURPOSE:To make the pin multiplication easier by a method wherein the pads of the second row group are provided in the gaps of the junction pads of the first row group. CONSTITUTION:Wirings 13 are made narrower than the junction pads 12 to arrange the other junction pads with the same shape in the spaces 15. Through these procedures, the pin multiplication may be made easier by means of containing multiple pads in a mounting substrate by forming the pads of the second row in the spaces of the pads of the first row. Besides a semiconductor chip 8 and the junction pads 13 of the mounting substrate may be connected 17 to be resin sealed 16.
申请公布号
JPS59107551(A)
申请公布日期
1984.06.21
申请号
JP19820216921
申请日期
1982.12.13
申请人
HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK